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This paper presents a method for all-digital background calibration of multiple channel mismatches including offset, gain and timing mismatches in time-interleaved analog-to-digital converters (TIADCs). The average technique is used to remove offset mismatch at each channel. The gain mismatch is calibrated by calculating the power ratio of the sub-ADC over the reference ADC. The timing skew mismatch is calibrated by using Hadamard transform for error correction and LMS for timing mismatch estimation. The performance improvement of TIADCs employing these techniques is demonstrated through numerical simulations. Besides, achievement results on the field-programmable gate array (FPGA) hardware have demonstrated the effectiveness of the proposed techniques.
Time-interleaved analog-to-digital converter (TIADC), channel mismatches, all-digital background calibration
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